Philips Semiconductors
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
Product specification
TDA9813T
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP.
MAX. UNIT
V18(cll)
lower video clipping voltage
level
−
0.7
0.9
Ro,18
output resistance
note 2
−
−
10
Iint 18
internal DC bias current for
emitter-follower
2.2
3.0
−
I18 max(sink)
maximum AC and DC output
sink current
1.6
−
−
I18 max(source) maximum AC and DC output
source current
2.9
−
−
B−1
−1 dB video bandwidth
CL < 50 pF; RL > 1 kΩ;
5
6
−
AC load
B−3
−3 dB video bandwidth
CL < 50 pF; RL > 1 kΩ;
7
8
−
AC load
αH(sup)
suppression of video signal CL < 50 pF; RL > 1 kΩ;
35
40
−
harmonics
AC load; note 7a
PSRR
power supply ripple rejection video signal; grey level;
32
35
−
at pin 18
see Fig.9
V
Ω
mA
mA
mA
MHz
MHz
dB
dB
CVBS buffer amplifier (only) and noise clipper (pins 8 and 19)
Ri,19
Ci,19
VI,19
Gv
V8(clu)
V8(cll)
Ro,8
Iint 8
Io,8 max(sink)
Io,10 max(source)
B−1
B−3
input resistance
input capacitance
DC input voltage
voltage gain
upper video clipping voltage
level
lower video clipping voltage
level
output resistance
DC internal bias current for
emitter-follower
maximum AC and DC output
sink current
maximum AC and DC output
source current
−1 dB video bandwidth
−3 dB video bandwidth
note 2
note 2
note 8
note 2
CL < 20 pF; RL > 1 kΩ;
AC load
CL < 20 pF; RL > 1 kΩ;
AC load
2.6
3.3
4.0
1.4
2
3.0
1.4
1.7
2.0
6.5
7
7.5
3.9
4.0
−
−
1.0
1.1
−
−
10
2.0
2.5
−
1.4
−
−
2.4
−
−
8.4
11
−
11
14
−
kΩ
pF
V
dB
V
V
Ω
mA
mA
mA
MHz
MHz
Measurements from IF input to CVBS output (pin 8; 330 Ω between pins 18 and 19, sound carrier off)
Vo CVBS(p-p)
Vo CVBS(sync)
CVBS output signal voltage
on pin 8
(peak-to-peak value)
sync voltage level
note 8
1.7
2.0
2.3
V
−
1.35
−
V
1999 Sep 16
10