HM62256A Series
Low VCC Data Retention Characteristics (Ta = 0 to +70ยฐC)
This characteristics is guaranteed only for L/L-SL version.
HM62256A Series
Parameter
Symbol Min Typ*1 Max Unit Test conditions
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
VCC for data retention
VDR
2
โ
โ
V
CS โฅ VCC โ 0.2 V, Vin โฅ 0 V
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Data retention current
ICCDR โ
0.2
30*2 ยตA VCC = 3.0 V, Vin โฅ 0 V
โโโโโโโโโโโโโโโ
โ
0.2
10*3 ยตA CS โฅ VCC โ 0.2 V
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Chip deselect to data retention time tCDR 0
โ
โ
ns See retention waveform
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Operation recovery time
tR
tRC*4 โ
โ
ns
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
Low VCC Data Retention Timing Waveform
VCC
4.5 V
2.2 V
VDR
CS
0V
t CDR
Data retention mode
tR
CS โฅ VCC โ 0.2 V
Notes: 1 Typical values are at VCC = 3.0 V, Ta = +25ยฐC and not guaranteed.
2. 20 ยตA max at Ta = 0 to +40ยฐC. (only for L-version)
3. 3 ยตA max at Ta = 0 to +40ยฐC. (only for L-SL version)
4. tRC = read cycle time.
5. CS controls address buffer, WE buffer, OE buffer, and Din buffer. If CS controls data
retention mode, Vin levels (address, WE, OE, I/O) can be in the high impedance state.
11