Features
• Low-voltage and Standard-voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 3.6V)
• Internally Organized 65,536 x 8
• 2-wire Serial Interface
• Schmitt Triggers, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 128-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms Typical)
• High Reliability
– Endurance: 100,000 Write Cycles
– Data Retention: 40 Years
– ESD Protection: >4000V
• Automotive Grade and Extended Temperature Devices Available
• 8-pin PDIP and 20-pin JEDEC SOIC, 8-pin LAP, and 8-ball dBGATM Packages
Description
The AT24C512 provides 524,288 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s
cascadable feature allows up to 4 devices to share a common 2-wire bus. The device
is optimized for use in many industrial and commercial applications where low-power
and low-voltage operation are essential. The devices are available in space-saving
8-pin PDIP, 20-pin JEDEC SOIC, 8-pin Leadless Array (LAP), and 8-ball dBGA pack-
ages. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to
5.5V) and 1.8V (1.8V to 3.6V) versions.
Pin Configurations
Pin Name
A0 - A1
SDA
SCL
WP
NC
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
20-pin SOIC
A0 1
A1 2
NC 3
NC 4
NC 5
NC 6
NC 7
NC 8
NC 9
GND 10
20 VCC
19 WP
18 NC
17 NC
16 NC
15 NC
14 NC
13 NC
12 SCL
11 SDA
8-pin PDIP
A0 1
A1 2
NC 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
8-pin Leadless Array
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 NC
4 GND
Bottom View
8-ball dBGA
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 NC
4 GND
Bottom View
2-wire Serial
EEPROM
512K (65,536 x 8)
AT24C512
Rev. 1116D–07/00
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