NX26F640C
DEVICE INFORMATION SECTOR
(READ ONLY)
64 MEGABIT
SERIAL FLASH MEMORY ARRAY
16,384 BYTE-ADDRESSABLE
256
SECTORS OF 522 BYTES EACH
ORGANIZED IN 256 BLOCKS OF
64 SECTORS PER BLOCK
A0-A2
CE
SCK
SIO
CONFIGURATION
REGISTER
STATUS
REGISTER
26 SERIES
NXS2
COMMAND AND
CONTROL LOGIC
PAGE LATCH / BUFFER
4176
HIGH-VOLTAGE
GENERATORS
SECTOR-ADDRESS
LATCH
DATA
SRAM BUFFER 1
(522 BYTES)
14
SRAM BUFFER 2
(522 BYTES)
STATE MACHINE AND CONTROL LOGIC
BYTE-ADDRESS
LATCH/COUNTER
10
Figure 1. NX26F640C Architectural Block Diagram
NexFlash Technologies, Inc.
5
PRELIMINARY NXSF020D-0902
09/05/02 ©