UTRON
Preliminary Rev. 0.1
UT62L2568(I)
256K X 8 BIT LOW POWER CMOS SRAM
DATA RETENTION CHARACTERISTICS (TA = - 40℃ to 85℃)
PARAMETER
Vcc for Data Retention
Data Retention Current
Chip Disable to Data
Retention Time
Recovery Time
SYMBOL
VDR
IDR
tCDR
tR
TEST CONDITION
MIN.
CE ≧ VCC-0.2V
1.5
Vcc=1.5V
-L -
CE ≧ VCC-0.2V - LL -
See Data Retention
Waveforms (below)
0
5
TYP.
-
MAX.
3.6
80
25
UNIT
V
µA
µA
-
-
ms
-
-
ms
DATA RETENTION WAVEFORM
VCC
CE1
VSS
CE2
2.5V
tCDR
VIH
VIL
Date Retention Mode
VDR ≧ 1.5V
CE1 ≧ VCC -0.2V
CE2 ≤ 0.2V
2.5V
tR
VIH
VIL
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
7
P80082