HN58X25128I/HN58X25256I
(Ta = โ40 to +85ยฐC, VCC = 2.5 V to 5.5 V)
Parameter
Symbol Alt
Min
Max
Clock frequency
fC
fSCK
โ
5
S active setup time
tSLCH
tCSS1
90
โ
S not active setup time
tSHCH
tCSS2
90
โ
S deselect time
tSHSL
tCS
90
โ
S active hold time
tCHSH
tCSH
90
โ
S not active hold time
tCHSL
โ
90
โ
Clock high time
tCH
tCLH
90
โ
Clock low time
tCL
tCLL
90
โ
Clock rise time
tCLCH
tRC
โ
1
Clock fall time
tCHCL
tFC
โ
1
Data in setup time
tDVCH
tDSU
20
โ
Data in hold time
tCHDX
tDH
30
โ
Clock low hold time after HOLD not tHHCH
โ
70
โ
active
Clock low hold time after HOLD active tHLCH
โ
40
โ
Clock high setup time before HOLD tCHHL
โ
60
โ
active
Clock high setup time before HOLD tCHHH
โ
60
โ
not active
Output disable time
tSHQZ
tDIS
โ
100
Clock low to output valid
tCLQV
tV
โ
70
Output hold time
tCLQX
tHO
0
โ
Output rise time
tQLQH
tRO
โ
50
Output fall time
tQHQL
tFO
โ
50
HOLD high to output low-Z
tHHQX
tLZ
โ
50
HOLD low to output low-Z
tHLQZ
tHZ
โ
100
Write time
tW
tWC
โ
5
Notes: 1. tCH + tCL โฅ 1/fC
2. Value guaranteed by characterization, not 100% tested in production.
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ยตs
ยตs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Notes
1
1
2
2
2
2
2
2
2
Rev.1.00, Jun.20.2003, page 8 of 27