CXG1015N
Recommended Evaluation Circuit
VDD
RX
VCTL2
PAIN
VGG2
GND
L2
C4
L3
C4
C4
C5
L1
L3
C2
C2
C3
GND
R1
C3
C1
L2
C2
C2
C3
Via
Hole
R1=1kΩ
L1=1.8nH
L2=2.2nH
L3=18nH
VPCTL
C1=1pF
C2=30pF
C3=100pF
C4=1nF
C5=10nF
VCTL1
ANT
Recommended Gate Bias Circuit and Circuit Characteristics
3.0V
(V)
VGG2
Glass fabric-base epoxy board
GND for the overall back side
Dimension : 25 mm × 25 mm
Thickness : 0.2 mm
100Ω
6.8kΩ
RV1 Variable
VGG2
resistor RV
RV2 10kΩ (Max.)
0.5
180Ω
1kΩ
0
5
RV1 (kΩ)
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
—4—