MX9691L View Datasheet(PDF) - Macronix International
Part Name
Description
Manufacturer
MX9691L Datasheet PDF : 41 Pages
| |||
MX9691L
Control ROM interface
Symbol
No.
ROMCS#/
75
FWIN#
Type
O
(CMOS)
ROMWR#/FDIR
76
O
(CMOS)
Miscellaneous
Symbol
X1
X2
SWAIT#
N.C.
TEST
PWR_RST#
LED#
No.
Type
79
I
78
O
71
I(CMOS
Schmitt)
70
O
81
I
(CMOS)
82
I(CMOS
Schmitt)
6
O
(CMOS)
VCC
GND
P/N:PM0546
17,45,53,
72,80,105,
112
7,25,38,
48,59,69,
77,91,108,
120
Description
ROM chip select/Flash memory data buffer enable :
In Free-run mode, this signal is used as ROM chip enable if
firmware that stored in external ROM. In ICE-debugging
mode, this signal is used as flash memory data buffer (74640)
enable if firmware that stored in flash memory array.
ROM write enable/Flash memory data buffer direction
control:
In Free-run mode, this signal is used as ROM write enable if
firmware that stored in external ROM. In ICE-debugging
mode, this signal is used as flash memory data buffer (74640)
direction control if firmware that stored in flash memory
array.
Description
Crystal input.
Crystal ouput.
Sleep wait, this pin is connected to external RC circuit.
No connect.
This signal is used to select the main system clock, either
from external clock source if this signal is high or from
internal PLL circuit if this signal is low. This pin includes an
internal pull-up resistor.
Power on reset, CMOS Schmite-triggered:
The MX9691L include debouncing circuit to stabilize
internal DSP reset signal.
LED output:
This signal is connected to external LED in debugging
system to indicate system status. The LED will be turn-on
during reset. The contorl firmware will turn off the LED after
H/W initialization and pass diagnostics. If system fail, the
control firmware will flash the LED to indicate some error
occur. This signal will be high if port 601Ch bit0 set to 1 or
OPTR bit2 set to 1.
5 or 3.3 volt Power pin
Ground pin
REV. 1.1, JUL. 02, 1999
10
Share Link: 