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ADP3415KRM-REEL7 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADP3415KRM-REEL7
ADI
Analog Devices 
ADP3415KRM-REEL7 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADP3415
ABSOLUTE MAXIMUM RATINGS*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
BST to GND . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +30 V
BST to SW . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
SW to GND . . . . . . . . . . . . . . . . . . . . . . . . . 2.0 V to +25 V
SD, IN, DRVLSD to GND . . . . . . . . . . . . . 0.3 V to +7.3 V
Operating Ambient Temperature Range . . . . . . 0C to 100C
Operating Junction Temperature Range . . . . . . 0C to 125C
qJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155C/W
qJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C/W
Storage Temperature Range . . . . . . . . . . . . 65C to +150C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
PIN CONFIGURATION
IN 1
10 BST
SD 2 ADP3415 9 DRVH
TOP VIEW
DRVLSD 3 (Not to Scale) 8 SW
DLY 4
7 GND
VCC 5
6 DRVL
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic
1
IN
2
SD
3
DRVLSD
4
DLY
5
VCC
6
DRVL
7
GND
8
SW
9
DRVH
10
BST
Function
TTL-Level Input Signal. Has primary control of the drive outputs.
Shutdown. When high, this pin enables normal operation. When low, DRVH and DRVL are forced low
and the supply current (ICCQ) is minimized as specified.
Drive-Low Shutdown. When DRVLSD is low, DRVL is kept low. When DRVLSD is high, DRVL is
enabled and controlled by IN and by the adaptive OPC function.
High-Side Turn-On Delay. A resistor from this pin to ground programs an extended delay from turn-off
of the lower FET to turn-on of the upper FET.
Input Supply. This pin should be bypassed to GND with a ~10 mF ceramic capacitor.
Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) FET.
Ground. Should be directly connected to the ground plane, close to the source of the lower FET.
This pin should be connected to the buck switching node, close to the upper FETs source. It is the
floating return for the upper FET drive signal. Also, it is used to monitor the switched voltage for the
OPC function.
Buck Drive. Output drive for the upper (buck) FET.
Floating Bootstrap Supply for the Upper FET. A capacitor connected between BST and SW pins holds
this bootstrapped supply voltage for the high-side FET driver as it is switched. The capacitor should be a
MLC type and should have substantially greater capacitance (e.g., ~ 20ϫ) than the input capacitance of
the upper FET.
Model
ADP3415KRM-REEL
ADP3415KRM-REEL7
ORDERING GUIDE
Temperature
Range
0C to 100C
0C to 100C
Package
Description
Mini_SO Package
(MSOP-10)
Mini_SO Package
(MSOP-10)
Package
Option
RM-10
RM-10
Number of
Units per Reel
3000
1000
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3415 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–3–

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