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CXA1734S View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
Manufacturer
CXA1734S
Sony
Sony Semiconductor 
CXA1734S Datasheet PDF : 21 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
CXA2064M
(1) L + R (MAIN)
When the audio multiplexing signal is inputted to COMPIN (Pin 7), the SAP signal and telemetry signal
are suppressed by STEREO LPF. Next, the pilot signals are canceled. Finally, the L R signal and
SAP signal are removed by MAIN LPF, and frequency characteristics are flattened (de-emphasized)
and input to the matrix.
(2) L R (SUB)
The L R signal follows the same course as L + R before the pilot signal is canceled. L R has no
carrier signal, as it is a suppressed-carrier double-sideband amplitude modulated signal (DSB-AM
modulated). For this reason, the pilot signal is used to regenerate the carrier signal (quasi-sine wave)
to be used for the demodulation of the L R signal. In the last stage, the residual high frequency
components are removed by SUB LPF and the L R signal is input to the dbx-TV block via the NRSW
circuit.
(3) SAP
SAP is an FM signal using 5fH as a carrier as shown in the Fig. 2. First, the SAP signal only is
extracted using SAP BPF. Then, this is subjected to FM detection. Finally, residual high frequency
components are removed and frequency characteristics flattened using SAP LPF, and the SAP signal
is input to the dbx-TV block via the NRSW circuit.
(4) Mode discrimination
Stereo discrimination is performed by detecting the pilot signal amplitude. SAP discrimination is
performed by detecting the 5fH carrier amplitude. NOISE discrimination is performed by detecting the
noise near 25kHz after FM detection of SAP signal.
(5) dbx-TV block
Either the L R signal or SAP signal input respectively from STIN (Pin 1) or SAPIN (Pin 27) is
selected by the mode control and input to the dbx-TV block.
The input signal then passes through the fixed de-emphasis circuit and is applied to the variable de-
emphasis circuit. The signal output from the variable de-emphasis circuit passes through an external
capacitor and is applied to VCA (voltage control amplifier). Finally, the VCA output is converted from a
current to a voltage using an operational amplifier and then input to the matrix.
The variable de-emphasis circuit transmittance and VCA gain are respectively controlled by Each of
effective value detection circuits. Each of the effective value detection circuits passes the input signal
through a predetermined filter for weighting before the effective value of the weighted signal is
detected to provide the control signal.
(6) Matrix
The signals (L + R, L R, SAP) input to MATRIXbecome the outputs for the ST-L, ST-R, MONO and
SAP signals according to the mode control and whether there is ST / SAP discrimination.
(7) Others
Biassupplies the reference voltage and reference current to the other blocks. The current flowing to
the resistor connecting IREF (Pin 5) with GND become the reference current.
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