AS5043 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

AS5043

PROGRAMMABLE 360° MAGNETIC ANGLE ENCODER WITH ABSOLUTE SSI AND ANALOG OUTPUTS

Unspecified 

AS5043 Programmable 360° Magnetic Angle Encoder

12.2 Analog Mode Programming

The analog output can be configured in many ways:

It consists of three major building blocks,

a digital range preselector,

a 10-bit Digital-to-Analog-Converter (DAC)

and an OP-AMP buffer stage.

In the default configuration (all OTP bits = 0), the analog output is set for 360° operation, internal DAC reference

(VDD5V/2), external OPAMP gain, 0-100% ratiometric to VDD5V.

Shown below is a typical example for a 0°-360° range, 0-5V output. The complete application requires only one external

component, a buffer capacitor at VDD3V3 and has only 3 connections VDD, VSS and Vout (connectors 1-3).

Note: the default setting for the OPAMP feedback path is:FB_intEn=0=external. The external resistors Rf and Rg must be

installed. In the programmed state (FB_intEn=1=internal), these resistors do not need to be installed as the feedback path is

internal (Rf_int and Rg_int).

Magnetic field range alarm. Active

low. Leave open or connect to

VSS if not used

1

AS5043 MagRngn

Mode pin.

Default = open

(low noise)

2

Mode

External DAC reference pin.

Leave open or connect to

VSS if not used

9

16

DACref

VDD5V

REF_extEN

1=ext

LDO

3.3V

0 360° 0

0 180° 1

1 90° 0

1 45° 1

OR1 OR0

from

DSP

Range

Selector

10bit

digital

Vref

DAC

0=int

VDD5V / 2

0 - 100% VDD5V /2

+

10bit

analog

ClampMdEN

0= 0-100% * Vref (def.)

1= 10-90% * Vref

-

FB_intEN

0=ext

1=int

Gain = 2x (int)

1 VDD

Connect pins 15 and

16 for VDD= 3.0-3.6V.

Do NOT connect for

15 VDD = 4.5-5.5V !

VDD3V3

1-10µF

DACout

10

DAC output pin.

Leave open if not used

VOUT 12

Rf_int

Rf

30k

Vout

2

RLmin

= 4k7

CL

<100pF

Rg_int

Rg

30k

CSn CLK DO PROG

3 46

Digital serial

interface, 10bit/360°.

Leave open if not

used. CSn and CLK

may also be tied to

VSS if not used

8

for OTP

programming and

alignment mode

only. Leave open

or connect to VSS

if not used

NC NC NC

5 13 14

Test pins.

Leave open

VDD

Vout

FB 11

VSS

OP-Amp feedback pin.

Leave open if not used.

7

3 VSS

0

360°angle

Revision 1.4, 04-Apr-06

Figure 14: analog output block diagram

www.austriamicrosystems.com

Page 11 of 26

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