LD7750E
R-C filter (as shown in Fig. 16) for higher power
applications to avoid the CS pin being damaged by the
negative turn-on spike.
Fig. 14
Current Sensing, Leading-edge Blanking
and the Negative Spike on CS Pin
The typical current mode PWM controller feedbacks both
current signal and voltage signal to close the control loop
and achieve regulation. The LD7750E detects the primary
MOSFET current from the CS pin, which is not only for the
peak current mode control but also for the pulse-by-pulse
current limit. The maximum voltage threshold of the
current sensing pin is set as 0.85V. Thus the MOSFET
peak current can be calculated as:
IPEAK(MAX)
=
0.85V
RS
A 250nS leading-edge blanking (LEB) time is included in
the input of CS pin to prevent false-trigger caused by the
current spike. For low power applications, if the total pulse
width of the turn-on spike is less than 250nS and the
negative spike on the CS pin is above -0.3V, the R-C filter
(as shown in Fig.15) is eliminable.
However, the total pulse width of the turn-on spike is
related to the output power, circuit design and PCB layout.
Nevertheless, it is strongly recommended to add a small
Leadtrend Technology Corporation
LD7750E-DS-00 February 2012
10
www.leadtrend.com.tw
Fig. 15
Fig. 16