C1, C0
These two pins should connect to Vdd operation.
ROW0 - ROW63
These pins provide the driving signals, COMMON, to the LCD panel. Please refer to the Table 3 on Page
10 for the COM signal mapping in different MUX.
SEG0 - SEG103
These pins provide the LCD driving signals, SEGMENT, to the LCD panel. The output voltage level of
these pins is VDD during sleep mode or standby mode.
ICONS
There are two ICONS pins (pin137 and 275) on the chip. Both pins output exactly the same signal. The
duplicated ICON pins will enhance the flexibility of the LCD layout.
IRS
This is the input pin that enables the internal contrast. This pin should be connected to VDD for any
circumstance.
TEST0-TEST7
These are input pins that reserved for testing purpose. These pins should be connected to VDD.
NC/T0 – T6
These are the No Connection pins. These pins should be left open and they are prohibited to have any
connections with one another.
9
SSD0817 Series
Rev 1.0
03/2002
SOLOMON