74LVTH125 View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

Manufacturer

74LVTH125

Low Voltage Quad Buffer with 3-STATE Outputs

Fairchild Semiconductor 

Dynamic Switching Characteristics(6)

Symbol

Parameter

VOLP

VOLV

Quiet Output Maximum

Dynamic VOL

Quiet Output Minimum

Dynamic VOL

Conditions

VCC (V) CL = 50 pF, RL = 500Ω

3.3 (7)

TA = 25°C

Min. Typ. Max.

0.8

3.3 (7)

–0.8

Notes:

6. Characterized in SOIC package. Guaranteed parameter, but not tested.

7. Max number of outputs defined as (n). n–1 data inputs are driven 0V to 3V. Output under test held LOW.

Units

V

V

AC Electrical Characteristics

Symbol

Parameter

TA = –40°C to +85°C,

CL = 50pF, RL = 500Ω

VCC = 3.3V ± 0.3V

Min. Typ.(8) Max.

VCC = 2.7V

Min. Max.

Units

tPLH

Propagation Delay, Data to Output

1.0

tPHL

1.0

tPZH

Output Enable Time

1.0

tPZL

1.1

tPHZ

Output Disable Time

1.5

tPLZ

1.3

tOSHL, tOSLH Output to Output Skew(9)

3.5

1.0

4.5

ns

3.9

1.0

4.9

4.0

1.0

5.5

ns

4.0

1.1

5.4

4.5

1.5

5.7

ns

4.5

1.3

4.0

1.0

1.0

ns

Notes:

8. All typical values are at VCC = 3.3V, TA = 25°C.

9. Skew is defined as the absolute value of the difference between the actual propagation delay for any two

separate outputs of the same device. The specification applies to any outputs switching in the same direction,

either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

Capacitance(10)

Symbol

Parameter

Conditions

Typical

CIN

Input Capacitance

VCC = 0V, VI = 0V or VCC

4

COUT

Output Capacitance

VCC = 3.0V, VO = 0V or VCC

8

Note:

10. Capacitance is measured at frequency f = 1MHz, per MIL-STD-883B, Method 3012.

Units

pF

pF

©1998 Fairchild Semiconductor Corporation

74LVTH125 Rev. 1.4.0

5

www.fairchildsemi.com

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