IDT72V36110L6BBGI View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

Manufacturer

IDT72V36110L6BBGI

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ 36-BIT FIFO

Integrated Device Technology 

IDT72V36100/72V36110 3.3V HIGH DENSITY SUPERSYNC IITM 36-BIT FIFO

65,536 x 36 and 131,072 x 36

COMMERCIAL AND INDUSTRIAL

TEMPERATURE RANGES

RCLK

tENS

REN

Q0 - Qn

Wx

tENH

tRTS

Wx+1

tSKEW2

1

2

tENS

tA

tA

W1 (4)

3

tA

W2 (4)

4

tENH

tA

W3 (4)

W4

WCLK

WEN

RT

OR

PAE

tRTS

tENS

1

tENH

tREF

2

tREF

tHF

tPAES

HF

tPAFS

PAF

6117 drw17

NOTES:

1. Retransmit setup is complete after OR returns LOW.

2. No more than D - 2 words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup procedure.

D = 65,537 for the IDT72V36100 and 131,073 for the IDT72V36110.

3. OE = LOW.

4. W1, W2, W3 = first, second and third words written to the FIFO after Master Reset.

5. There must be at least two words written to the FIFO before a Retransmit operation can be invoked.

6. RM is set HIGH during MRS.

Figure 12. Retransmit Timing (FWFT Mode)

32

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