M48T212A
Address Decoding
The M48T212A accommodates 4 address lines
(A3-A0) which allow access to the sixteen bytes of
the TIMEKEEPER clock registers. All TIMEKEEP-
ER registers reside in the controller chip itself. All
TIMEKEEPER registers are accessed by enabling
E (Chip Enable).
READ MODE
The M48T212A executes a read cycle whenever
W (Write Enable) is high and E (Chip Enable) is
low. The unique address specified by the address
inputs (A3-A0) defines which one of the on-chip
TIMEKEEPER registers is to be accessed. When
the address presented to the M48T212A is in the
range of 0h-Fh, one of the on-board TIMEKEEP-
ER registers is accessed and valid data will be
available to the eight data output drivers within
tAVQV after the address input signal is stable, pro-
viding that the E and G access times are also sat-
isfied. If they are not, then data access must be
measured from the latter occurring signal (E or G)
and the limiting parameter is either tELQV for E or
tGLQV for G rather than the address access time.
When EX input is low, an external SRAM location
will be selected.
Note: Care should be taken to avoid taking both E
and EX low simultaneously to avoid bus conten-
tion.
Table 11. Write Mode AC Characteristics
(TA = 0 to 70°C)
M48T212A
Symbol
Parameter
-85
Min
Max
tAVAV
Write Cycle Time
85
tAVWL
Address Valid to Write Enable Low
0
tAVEL
Address Valid to Chip Enable Low
0
tWLWH
Write Enable Pulse Width
55
tELEH
Chip Enable Low to Chip Enable High
60
tWHAX
Write Enable High to Address Transition
0
tEHAX
Chip Enable High to Address Transition
0
tDVWH
Input Valid to Write Enable High
30
tDVEH
Input Valid to Chip Enable High
30
tWHDX
Write Enable High to Input Transition
0
tEHDX
Chip Enable High to Input Transition
0
tWLQZ (1,2) Write Enable Low to Output High-Z
25
tAVWH
Address Valid to Write Enable High
65
tAVEH
Address Valid to Chip Enable High
65
tWHQX (1,2) Write Enable High to Output Transition
5
Note: 1. CL = 5pF.
2. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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