Quick-PWM Slave Controllers for
Multiphase, Step-Down Supplies
current-limit threshold of 40mV to 150mV. Use 1% toler-
ance resistors in the divider with 10µA to 20µA DC bias
current to prevent significant errors due to the ILIM
pin’s input current. Reducing the current-limit threshold
voltage lowers the sense resistor’s power dissipation,
but this also increases the relative measurement error:
VILIM(SLAVE)
20µA
≤ RD
≤
VILIM(SLAVE)
10µA
RC
=
VREF(MASTER)
VILIM(SLAVE)
− 1RD
Now, set the current-limit adjustment ratio (AADJ =
VITHM(HIGH)/VITHM(LOW)) greater than the maximum to
minimum on-resistance ratio (ARDS = RDS(ON)(MAX)/
RDS(ON)(MIN)):
AADJ ≥ AROS
1+
RA //RB
RLIMIT
≥
RDS(ON)(MAX)
RDS(ON)(MIN)
Increasing AADJ improves the master’s current-limit
accuracy but also increases the current limit’s noise
sensitivity. Therefore, RLIMIT may be selected using the
following equation:
( ) RLIMIT
≤
RA //RB RDS(ON)(MIN)
RDS(ON)(MAX) − RDS(ON)(MIN)
Finally, verify that the total load on the master’s refer-
ence does not exceed 50µA:
( ) IBIAS(TOTAL)
=
RA
+
VREF
RB // RLIMIT
+
VREF
RC + RD
≤ 50µA
Current Limit Design Example
For the typical application circuit shown in Figure 1: VIN
= 12V, VOUT = 1.3V, fSW = 300kHz, η = 2, ILOAD(MAX)
= 50A, L = 0.6µH, RDS(ON)(MAX) = 6mΩ, RDS(ON)(MIN )
= 3mΩ
1) Determine the peak-to-peak inductor current and
the valley current limit:
1.3V x(12V −1.3V)
∆IINDUCTOR = 12V x300kHz x0.6µH = 6.4A
ILIMIT(VALLEY)
=
50A
2
−
1
2
x
6.4A
=
21.8A
2) Determine the master’s current-limit threshold from
the valley current limit and low-side MOSFETs’ max-
imum on-resistance over temperature:
VITH(MASTER) ≥ 21.8A ✕ 6mΩ = 130mV
Now select the resistive-divider values (RA and RB
in Figure 5) to set the appropriate voltage at the
master’s ILIM input:
RB
=
10
x130mV
20µA
to
10 x130mV
10µA
=
65kΩ
to130kΩ
Selecting RB = 100kΩ ±1% provides the following
value for RA:
RA
=
2V
10x130mV
− 1
x100kΩ ≈54kΩ
3) Determine the slave’s current-limit threshold:
VITHS
≥
1.5mΩ
x
130mV
6mΩ
+
6.4 A
≈
42mV
Select the resistive-divider values (RC and RD in
Figure 5) to set the appropriate voltage at the
slave’s ILIM input:
RD
=
10 x42mV
20µA
10 x42mV
to 10µA
=
21kΩ to42kΩ
Selecting RD = 30.1kΩ ±1% provides the following
value for RA:
RC
=
2V
10x42mV
− 1
x30.1kΩ ≈113kΩ
4) Determine RLIMIT (Figure 5) from the above equation:
(53.6kΩ //100kΩ) x 3mΩ
RLIMIT ≤
6mΩ − 3mΩ
≈ 35kΩ
5) Finally, verify that that the total bias currents do not
exceed the 50µA maximum load of the master’s ref-
erence:
( ) IBIAS(TOTAL)
=
54kΩ
+
2V
100kΩ // 34.8kΩ
+
2V
30.1kΩ +113kΩ
=
36µA
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