MAX1967 View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX1967

Low-Cost Voltage-Mode PWM Step-Down Controllers

Maxim Integrated 

Low-Cost Voltage Mode PWM

Step-Down Controller

4) Select compensation capacitor C6 so that the error

amp zero is equal to the complex pole frequency

LC of the inductor and output capacitor:

C6 =

L × COUT

R3

Input Capacitor Selection

The input capacitor (C2) reduces noise injection and

the current peaks drawn from the input supply. The

source impedance to the input supply determines the

value of C2. High source impedance requires high

input capacitance. The input capacitor must meet the

ripple current requirement (IRMS) imposed by the

switching currents. The RMS input ripple current is

given by:

IRMS = ILOAD ×

( ) VOUT × VVIN − VOUT

VVIN

For optimal circuit reliability, choose a capacitor that

has less than a 10°C temperature rise at the peak rip-

ple current.

Power MOSFET Selection

The MAX1966/MAX1967s’ step-down controller drives

two external logic-level N-channel MOSFETs. The key

selection parameters are:

1) On-resistance (RDS(ON)) of both MOSFETs for cur-

rent limit and efficiency

2) Current capability of VL (MAX1967 only) and gate

charge (QT)

3) Voltage rating and maximum input voltage

MOSFET Power Dissipation

Worst-case conduction losses occur at the duty factor

extremes. For the high-side MOSFET, the worst-case

power dissipation due to resistance occurs at minimum

input voltage:

PD(N1RESISTIVE)

=

VOUT

VVIN(MIN)

× ILOAD2

× RDS(ON)

The following switching loss calculation for the high-

side N-FET provides an approximation, but is no substi-

tute for evaluation:

PD(N1/ SWITCHING)

=

ILOAD

IGATE

× VVIN(MAX)2 × fOSC × CRSS

5V TO 28V FOR

GATE BIAS

VIN

VL

VCC

BST

DH

MAX1967

LX

COMP/EN DL

3.3V

INPUT

VOUT

GND

FB

R1

R2

Figure 5. Low Input Voltage Step-Down with Extra Bias Supply

for Gate Drive

where CRSS is the reverse transfer capacitance of N1

and IGATE is the peak gate-drive source/sink current

(1A typical). For the low-side N-FET (N2), the worst-

case power dissipation occurs at maximum input volt-

age:

PD(N2)

=



1−

VOUT

VVIN





×

ILOAD2

×

RDS(ON)

The low-side MOSFET on-resistance sets the

MAX1966/MAX1967 current limit. See the Setting the

Current Limit section for information on selecting low-

side MOSFET RDSON. For designs supplying 5A or

less, it is often possible to combine the high-side and

low-side MOSFETs into a single package (usually an 8-

pin SO) as indicated in Table 1. For higher output appli-

cations, or those where efficiency is more important,

separate FETs are usually preferred.

Very-Low-Voltage Applications

The MAX1966/MAX1967 are extremely versatile con-

trollers that can be used in a variety of applications

where high efficiency, high output power, and opti-

mized cost are important. One alternate connection,

shown in Figure 5, is useful when a low-voltage supply

is to be stepped down to an even lower voltage at high

current. If an additional bias supply is available, it can

supply gate drive separately from the input power rail.

This can either improve efficiency, or allow lower cost

5V logic-level MOSFETs to be used in place of 3V

MOSFETs.

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