MAX3935E(2002) View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX3935E
(Rev.:2002)

10.7Gbps EAM Driver

Maxim Integrated 

10.7Gbps EAM Driver

Pin Description (continued)

PIN

NAME

FUNCTION

26

BIASSET

Bias Current Set. Connected to the output of an external op amp (see the Design Procedure

section).

27

BIASMON Bias Current Monitor. (VBIASMON - VEE) / 7.5Ω = IBIAS.

31

MODEN

TTL/CMOS Modulation Enable Input. Low for normal operation, high to put the EAM in the

absorption (logic 0) state. Internal 100kΩ pullup to GND.

32

RTEN

TTL/CMOS Data Retiming Input. Low for retimed data, high to bypass retiming latch. Internal

100kΩ pullup to GND.

DATA+

DATA-

PATTERN

GENERATOR

CLK+

CLK-

50Ω

50Ω

50Ω

50Ω

-5.2V

DATA+

DATA-

VTT

GND

MODN1

BIAS

MAX3935EGJ

MOD

CLK+

CLK-

RTEN

MODN2

MODEN

-5.2V

15Ω

50Ω

OSCILLOSCOPE

VOUT

50Ω

-5.2V

Figure 1. AC Characterization Circuit

Detailed Description

The MAX3935 EAM driver consists of a high-speed

modulation driver and an EAM-biasing block (see

Figure 3). The clock and data inputs to the modulation

driver interface with ECL and CML logic levels. The

modulation and bias outputs sink current to VEE at

-5.2V.

The modulation output stage is composed of a high-

speed differential pair and a programmable current

source rise times a maximum modulation current of

100mA. The rise and fall times are typically 34ps. The

modulation current is designed to produce an EAM

voltage up to 3.0VP-P when driving a 50Ω module. The

3.0Vp-p results from 100mA through 50Ω in parallel

with an internal 75Ω resistor (30Ω).

Any loading of the EAM module with capacitance

degrades the optical output performance. Because the

BIAS output is connected to the EAM, minimize the par-

asitic capacitance associated with this pad by using an

inductor (L) to isolate the BIAS pin from the EAM.

Clock/Data Input Logic Levels

The MAX3935 is directly compatible with 0V reference

CML. Other logic interfaces are possible with AC-cou-

pling capacitors. For 0V CML of AC-coupled logic, set

VTT to 0V. For other DC-coupled differential signals, set

VTT to the common-mode input voltage.

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