MAX6356 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MAX6356 Datasheet PDF : 8 Pages
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Dual/Triple-Voltage
µP Supervisory Circuits
Watchdog Input
(MAX6358/MAX6359/MAX6360)
The MAX6358/MAX6359/MAX6360 include a WDI to
provide a reset if the µP goes into an infinite loop. After
a reset, the start-up timeout period and the initial time-
out period is nominally 46.4sec to allow the µP time to
initialize. After the first transition on the WDI and after
any toggle of the watchdog thereafter, the timeout peri-
od is nominally 2.9sec.
Applications Information
Ensuring a Valid RESET Output
Down to VCC = 0
In some systems, it is necessary to ensure a valid reset
even if VCC falls to 0. In these applications, use the cir-
cuit shown in Figure 3. Note that this configuration does
not work for the open-drain outputs of the MAX6352/
MAX6355/MAX6358.
Monitoring a Negative Voltage
To monitor a negative supply rail using RSTIN or the
MAX6355/MAX6356/MAX6357, use the circuit shown in
Figure 4. In this configuration, a reset is issued when
the negative supply falls below VINTH.
Interfacing to µPs with
Bidirectional Reset Pins
Microprocessors with bidirectional reset pins will con-
tend with the push-pull outputs of these devices. To
prevent this, connect a 4.7kΩ resistor between RESET
and the µP’s reset I/O port, as shown in Figure 5. Buffer
RESET as shown in the figure if this reset is used by
other components in the system.
VCC5
R1
MAX6355
MAX6356
MAX6357
RSTIN
R2
VIN
VINTH = 1.22 -
R2
R1
(VCC5 - 1.22)
VCC5
≥
-
VINR1
R2
VCC5 ≥ VRSTIN
Figure 4. Monitoring a Negative Voltage
+3.3V/+3V +5V
VCC5
RST
VCC3
RST3
RST5
100k
MAX6351–MAX6360
GND
VCC3 VCC5
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
VCC5
VCC3
RST
4.7k
RST3
RST5
MAX6351–MAX6360
GND
µP
RESET
GND
Figure 3. Ensuring a Valid Reset Low to VCC5 and VCC3 = 0
Figure 5. Interfacing to µPs with Bidirectional Reset I/O
Chip Information
TRANSISTOR COUNT: 855
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