MT48LC16M16A2BB-6A(2007) View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT48LC16M16A2BB-6A
(Rev.:2007)

256Mb: x4, x8, x16 SDRAM F

Micron Technology 

256Mb: x4, x8, x16 SDRAM

Timing Diagrams

Figure 42: Read – With Auto Precharge

T0

CLK

tCKS tCKH

CKE

tCMS tCMH

COMMAND

ACTIVE

T1

tCK

NOP

DQM/

DQML, DQMU

A0–A9,

A11, A12

tAS tAH

ROW

T2

tCL

tCH

READ

tCMS tCMH

COLUMN m2

T3

NOP

A10

BA0, BA1

tAS tAH

ROW

tAS tAH

BANK

ENABLE AUTO PRECHARGE

BANK

DQ

tRCD

tRAS

tRC

tAC

tLZ

CAS Latency

T4

T5

T6

T7

NOP

NOP

NOP

NOP

tAC

tOH

DOUT m

tAC

tOH

DOUT m + 1

tAC

tOH

DOUT m + 2

tRP

tOH

DOUT m + 3

tHZ

T8

ACTIVE

ROW

ROW

BANK

Notes:

1. For this example, BL = 4 and CL = 2.

2. x16: A9, A11, and A12 = “Don’t Care”

x8: A11 and A12 = “Don’t Care”

DON’T CARE

UNDEFINED

PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8

256MSDRAM_2.fm - Rev. L 10/07 EN

62

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©1999 Micron Technology, Inc. All rights reserved.

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