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MT48LC16M16A2BB-6A(2007) View Datasheet(PDF) - Micron Technology

Part Name
Description
Manufacturer
MT48LC16M16A2BB-6A
(Rev.:2007)
Micron
Micron Technology 
MT48LC16M16A2BB-6A Datasheet PDF : 77 Pages
First Prev 61 62 63 64 65 66 67 68 69 70 Next Last
256Mb: x4, x8, x16 SDRAM
Timing Diagrams
Figure 49: Write – With Auto Precharge
T0
T1
T2
T3
T4
T5
T6
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
WRITE
NOP
DQM/
DQML, DQMU
A0–A9,
A11, A12
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
tCMS tCMH
COLUMN m2
ENABLE AUTO PRECHARGE
BANK
DQ
tRCD
tRAS
tRC
tDS tDH
DIN m
tDS tDH
DIN m + 1
NOP
tDS tDH
DIN m + 2
NOP
NOP
tDS tDH
DIN m + 3
tWR
Notes:
1. For this example, BL = 4.
2. x16: A9, A11, and A12 = “Don’t Care”
x8: A11 and A12 = “Don’t Care”
x4: A12 = “Don’t Care”
T7
T8
T9
NOP
NOP
ACTIVE
ROW
ROW
BANK
tRP
DON’T CARE
PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8
256MSDRAM_2.fm - Rev. L 10/07 EN
69
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©1999 Micron Technology, Inc. All rights reserved.

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