MT48LC16M16A2BB-6A(2007) View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT48LC16M16A2BB-6A
(Rev.:2007)

256Mb: x4, x8, x16 SDRAM F

Micron Technology 

256Mb: x4, x8, x16 SDRAM

Timing Diagrams

Figure 53: Write – Full-Page Burst

T0

CLK

T1

tCL

tCH

tCKS tCKH

CKE

tCMS tCMH

COMMAND

ACTIVE

NOP

T2

tCK

WRITE

DQM/

DQML, DQMU

tCMS tCMH

A0–A9,

A11, A12

tAS tAH

ROW

tAS tAH

A10

ROW

BA0, BA1

tAS tAH

BANK

COLUMN m1

BANK

DQ

tRCD

tDS tDH

DIN m

T3

NOP

T4

NOP

T5

( ( Tn + 1

))

((

))

((

))

((

))

((

))

NOP ( (

))

NOP

((

))

((

))

Tn + 2

Tn + 3

BURST TERM

NOP

((

))

((

))

((

))

((

))

((

))

((

))

tDS tDH

DIN m + 1

tDS tDH

DIN m + 2

tDS tDH

((

))

DIN m + 3 ( (

))

tDS tDH

DIN m - 1

512 (x16) locations within same row

1,024 (x8) locations within same row

2,048 (x4) locations within same row

Full-page burst does

not self-terminate.

Can use BURST TERMINATE

command to stop.2, 3

Full page completed

DON’T CARE

Notes:

1. x16: A9, A11, and A12 = “Don’t Care”

x8: A11 and A12 = “Don’t Care”

x4: A12 = “Don’t Care”

2. tWR must be satisfied prior to PRECHARGE command.

3. Page left open; no tRP.

PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8

256MSDRAM_2.fm - Rev. L 10/07 EN

73

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©1999 Micron Technology, Inc. All rights reserved.

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