MB87L2250 View Datasheet(PDF) - Fujitsu

Part Name

Description

Manufacturer

MB87L2250

MPEG2 Transport, Video and Audio Decoder with integrated 32-Bit RISC CPU

Fujitsu 

Product Profile

October 1998

Edition 1.1

MB87L2250 - MPEG2 Decoder

2. General Features

2.1. ARC 32-Bit RISC CPU

• Pipelined 32-bit RISC Microprocessor

• 32 x 32 bit general purpose registers as standard

• 4 stage pipeline; 1 Kbyte I-Cache

• 8 Mbyte SRAM address space for instruction and data

• 8 Mbyte SDRAM address space for instruction and data

• Basic core contains ALU for arithmetic and logic operations

• 2 and 3-operated instructions

• 9-bit sign-extended or 32-bit immediate data

• Delayed branches

• Conditional execution of regular instructions

• Optional flag setting

• Zero overhead loop feature

• Score boarded delayed loads from memory

• Loads and Stores support 32/16/8 bit data at any 32-bit address

• Address write back for table traversal in memory

• Access local RAM and control registers via special load & store instructions

• Auxiliary register space provides a 32-bit address space separate from the memory system

- Mapping MPEG registers and MPEG memory into auxiliary address space

- Mapping ARC registers into auxiliary address space

• Commercial development tools

- MetaWare High CTM ‘C’ compiler, assembler, linker

- MetaWare SeeCodeTM graphical debugger operates in 2 modes:

• interfaces to hardware evaluation board, or: simulates software using a ‘C’ model of the ARC

2.2. Host Interface (optional)

• Three different CPU’s supported (FR30, 68xxx, SPARClite)

2.3. Transport Demultiplex

• Parallel or serial input format for transport stream

• 60 Mbit/s max. input data rate

• MPEG-2 transport stream ISO/IEC 13818-1 compliant

• DVB descrambler for TS and PES descrambling

• Support for 32 PID’s:

- 1 PID for video / 1 PID for audio / 1 PID for Teletext (EBU Teletext SPB-492)

- 29 PID’s for section data (PAT, PMT, PSI and private SI as Electronic Program Guide etc.)

• Flexible section processing like:

- individual compare resource allocation to each stream

- target number and compare length programmable on a stream base

- maximum compare size of 32 targets

- maximum compare length of 16 bytes (including TID)

- special mode for version number filtering (not equal filtering)

- each bit of all the targets individually maskable

- overall compare capacity of 422 byte

- IRQ generation at the end of a received section

- IRQ generation at the end of a received packet

- IRQ generation in case of incomplete section (verification with section length)

- IRQ generation in case of continuity counter error

- IRQ status register with stream number, IRQ source

- stream disabling in case of section error

- IRQ generation in case of incomplete section comparing (packet end)

- all IRQ s maskable on a stream base

Fujitsu Mikroelektronik GmbH Proprietary Information

3

Confidential

Share Link: