LH7A404
NXP Semiconductors
32-Bit System-on-Chip
LFBGA
SIGNAL
E6
E15
F5
F16
J16
M5
R5
R16
T6
T15
Y17
W17
V16
U15
W16
V13
D2
E1
F3
F4
C1
VSSC
VDDA
VSSA
VDDAD
VSSAD
nPOR
nURESET
WAKEUP
nPWRFL
nEXTPWR
C5 nRESETOUT
Y18 XTALIN
Y19 XTALOUT
T19 XTAL32IN
T20 XTAL32OUT
L2 PGMCLK
T16 CLKEN
Y13 WIDTH0
W13 WIDTH1
E4 MEDCHG
Y20 INTBOOT
Table 2. LH7A404 Functional Pin List (Cont’d)
DESCRIPTION
RESET
STATE
STANDBY
STATE
OUTPUT
DRIVE
I/O
NOTES
Core Ground
Analog Power for PLL1 and PLL2
Analog Ground for PLL1 and PLL2
Analog Power for A/D, Touch Screen Controller
Analog Ground for A/D, Touch Screen Controller
Power on Reset
User Reset
Wake Up
Power Fail Signal
External Power
Reset Output to external devices. This pin carries the
same state as the internal SoC reset signal.
14.7456 MHz Crystal Oscillator pins. For an external
clock source, XTALIN can be used while XTALOUT is
left unconnected. XTALIN voltage is 1.8 V nominal.
32.768 kHz Real Time Clock, Crystal Oscillator pins.
To drive the device from an external clock source,
XTAL32IN can be used while XTAL32OUT is left
unconnected.
Programmable Clock (14.7456 MHz MAX.)
External Oscillator Enable Output
Boot Width Pins. Used with the MEDCHG and INT-
BOOT bits for internal Boot ROM. On power up, the
values on these pins are latched to determine the
width and type of Boot device. Boot width can be 8-,
16-, or 32-bit. The pins must be pulled HIGH with a 33
k resistor.
Media Change bit; used at power on with INTBOOT
and WIDTHx pins to determine boot device.
When LOW, boot device is selected according to the
MEDCHG bit. When HIGH, the lower 64 kB address-
es are mapped to the internal Boot ROM.
Input
Input
Input
Input
Input
LOW
LOW
LOW
Input
Input
Input
Input
Input
Input
Input
Input
I
3
I
3
I
3
I
3
I
3
12 mA O
LOW
LOW
8 mA O
8 mA I/O
Input
I
3
No Change
No Change
I
3
I
4
Product data sheet