TABLE OF CONTENTS
Functional Block Diagram – 32 Meg x 4 ............... 4
Functional Block Diagram – 16 Meg x 8 ............... 5
Functional Block Diagram – 8 Meg x 16 ............. 6
Pin Descriptions ...................................................... 7
Functional Description ......................................... 9
Initialization ...................................................... 9
Register Definition ............................................. 9
Mode Register ............................................... 9
Burst Length ............................................ 9
Burst Type ................................................ 10
Read Latency ........................................... 11
Operating Mode ...................................... 11
Extended Mode Register ............................... 12
DLL Enable/Disable ................................. 12
Commands ............................................................ 13
Truth Table 1 (Commands) ........................................ 13
Truth Table 1A (DM Operation) .................................. 13
Deselect .............................................................. 14
No Operation (NOP) ........................................ 14
Load Mode Register .......................................... 14
Active ................................................................ 14
Read ................................................................ 14
Write ................................................................ 14
Precharge ........................................................... 14
Auto Precharge .................................................. 14
Burst Terminate ................................................. 14
Auto Refresh ...................................................... 15
Self Refresh ........................................................ 15
Operation .............................................................. 16
Bank/Row Activation ....................................... 16
Reads ................................................................ 17
Read Burst .................................................... 18
Consecutive Read Bursts .............................. 19
Nonconsecutive Read Bursts ....................... 20
Random Read Accesses ................................ 21
Terminating a Read Burst ............................ 23
Read to Write ............................................... 24
Read to Precharge ......................................... 25
Writes ................................................................ 26
Write Burst ................................................... 27
Consecutive Write to Write ......................... 28
Nonconsecutive Write to Write .................. 29
PRELIMINARY
128Mb: x4, x8, x16
DDR SDRAM
Random Writes ............................................ 30
Write to Read – Uninterrupting .................. 31
Write to Read – Interrupting ....................... 32
Write to Read – Odd, Interrupting ............. 33
Write to Precharge – Uninterrupting .......... 34
Write to Precharge – Interrupting ............... 35
Write to Precharge – Odd, Interrupting ...... 36
Precharge ........................................................... 37
Power-Down ..................................................... 37
Truth Table 2 (CKE) ................................................. 38
Truth Table 3 (Current State, Same Bank) ..................... 39
Truth Table 4 (Current State, Different Bank) ................. 41
Operating Conditions
Absolute Maximum Ratings .................................... 43
DC Electrical and Operating Conditions ................... 43
AC Input Operating Conditions ........................... 43
Clock Input Operating Conditions ....................... 44
Input Voltage ......................................................... 45
Capacitance – x4, x8 .............................................. 46
IDD Specifications and Conditions – x4, x8 ........... 46
Capacitance – x16 .................................................. 47
IDD Specifications and Conditions – x16 ............... 47
AC Electrical Characteristics (Timing Table) .......... 48
Slew Rate Derating Tables ...................................... 49
Derating Data Valid Window ............................... 51
Voltage and Timing Waveforms
Normal Output Drive Curves ........................... 54
Reduced Output Drive Curves (x16 only) ........ 55
Output Timing – tDQSQ and tQH – x4, x8 ..... 56
Output Timing – tDQSQ and tQH – x16 ......... 57
Output Timing – tAC and tDQSCK ................. 58
Input Timing ..................................................... 58
Initialize and Load Mode Registers .................. 59
Power-Down Mode .......................................... 60
Auto Refresh Mode ........................................... 61
Self Refresh Mode ............................................. 62
Reads
Bank Read – Without Auto Precharge ........ 63
Bank Read – With Auto Precharge .............. 64
Writes
Bank Write – Without Auto Precharge ....... 65
Bank Write – With Auto Precharge ............. 66
Write – DM Operation ................................ 67
66-pin TSOP dimensions ........................................ 68
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
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©2001, Micron Technology, Inc.