NXP Semiconductors
74AHC00; 74AHCT00
Quad 2-input NAND gate
Table 2.
Symbol
3Y
3A
3B
4Y
4A
4B
VCC
Pin description …continued
Pin
8
9
10
11
12
13
14
Description
data output
data input
data input
data output
data input
data input
supply voltage
6. Functional description
Table 3. Function selection[1]
Input
nA
nB
L
X
X
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
Output
nY
H
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
supply voltage
VI
input voltage
IIK
input clamping current
IOK
output clamping current
IO
output current
VI < −0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
VO = −0.5 V to (VCC + 0.5 V)
−0.5 +7.0 V
−0.5 +7.0 V
[1] −20
-
mA
[1] -
±20
mA
-
±25
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
SO14 package
Tamb = −40 °C to +125 °C
-
75
mA
−75 -
mA
−65 +150 °C
[2] -
500 mW
TSSOP14 package
[3] -
500 mW
DHVQFN14 package
[4] -
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 °C.
[3] Ptot derates linearly with 5.5 mW/K above 60 °C.
[4] Ptot derates linearly with 4.5 mW/K above 60 °C.
74AHC_AHCT00_3
Product data sheet
Rev. 03 — 8 January 2008
© NXP B.V. 2008. All rights reserved.
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