NXP Semiconductors
74LV165A
8-bit parallel-in/serial-out shift register
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V)[1]
Symbol Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
IIK
input clamping current
VI < 0 V
VI
input voltage
IOK
output clamping current
VO > VCC or VO < 0
VO
output voltage
power-down mode
0.5
+7
V
-
20
mA
0.5
+7
V
-
50
mA
0.5
0.5
VCC + 0.5 V
+7
V
IO
ICC
IGND
Tstg
output current
supply current
ground current
storage temperature
0 V < VO < VCC
-
25
mA
-
+50
mA
50
-
mA
65
+150
C
Ptot
total power dissipation
Tamb = 40 C to +85 C
SO16 package
[2] -
500
mW
TSSOP16 package
[3] -
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 C.
[3] Ptot derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VCC
VI
VO
Tamb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
2.0
-
0
-
0
-
40
-
VCC = 2.3 V to 2.7 V
0
-
VCC = 3.0 V to 3.6 V
0
-
VCC = 4.5 V to 5.5 V
0
-
5.5
V
5.5
V
VCC
V
+85
C
200
ns/V
100
ns/V
20
ns/V
74LV165A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 28 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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