Philips Semiconductors
74LVC3G07
Triple buffer with open-drain output
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; Tamb = 25 °C.
Symbol Parameter
Conditions
Min Typ Max Unit
tPLZ, tPZL
propagation delay VCC = 1.8 V;
input nA to output nY CL = 30 pF; RL = 1 kΩ
-
2.9 -
ns
VCC = 2.5 V;
CL = 30 pF; RL = 500 Ω
-
1.7 -
ns
VCC = 2.7 V;
CL = 50 pF; RL = 500 Ω
-
2.3 -
ns
VCC = 3.3 V;
CL = 50 pF; RL = 500 Ω
-
2.1 -
ns
VCC = 5.0 V;
CL = 50 pF; RL = 500 Ω
-
1.5 -
ns
CI
input capacitance
-
2.5 -
pF
CPD
power dissipation VCC = 3.3 V
capacitance per gate
[1] [2] -
6.5 -
pF
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
[2] The condition is VI = GND to VCC.
4. Ordering information
Table 2: Ordering information
Type number Package
Temperature range
74LVC3G07DP −40 °C to +125 °C
74LVC3G07DC −40 °C to +125 °C
74LVC3G07GT −40 °C to +125 °C
Name
TSSOP8
VSSOP8
XSON8
Description
plastic thin shrink small outline package; 8 leads; body
width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 1 × 1.95 × 0.5 mm
Version
SOT505-2
SOT765-1
SOT833-1
5. Marking
9397 750 14542
Product data sheet
Table 3: Marking codes
Type number
74LVC3G07DP
74LVC3G07DC
74LVC3G07GT
Marking code
V07
V07
V07
Rev. 03 — 01 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2 of 14