74LVC3G14GD View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

74LVC3G14GD

Triple inverting Schmitt trigger with 5 V tolerant input

NXP Semiconductors. 

NXP Semiconductors

74LVC3G14

Triple inverting Schmitt trigger with 5 V tolerant input

14

ICC

(mA)

12

10

8

6

mdb627

4

2

0

0

0.5

1

1.5

2

VI (V)

VCC = 3.0 V

Fig 12. Typical transfer characteristics

15. Application information

The slow input rise and fall times cause additional power dissipation, this can be

calculated using the following formula:

Padd = fi × (tr × ∆ICC(AV) + tf × ∆ICC(AV)) × VCC where:

Padd = additional power dissipation (µW);

fi = input frequency (MHz);

tr = input rise time (ns); 10 % to 90 %;

tf = input fall time (ns); 90 % to 10 %;

∆ICC(AV) = average additional supply current (µA).

∆ICC(AV) differs with positive or negative input transitions, as shown in Figure 13.

An example of a relaxation circuit using the 74LVC3G14 is shown in Figure 14.

74LVC3G14_7

Product data sheet

Rev. 07 — 12 June 2008

© NXP B.V. 2008. All rights reserved.

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