AAT3131ITP-T1 View Datasheet(PDF) - Advanced Analogic Technologies
Part Name
Description
Manufacturer
AAT3131ITP-T1
Advanced Analogic Technologies
AAT3131ITP-T1 Datasheet PDF : 14 Pages
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AAT3131
High Efficiency 1X/1.5X Fractional
Charge Pump for White LED Applications
Table 1: Constant Current Source
Output Programming Levels (mA)
Address
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Current Level Settings
D1-3
D4
0.0
0
0.5
0
1.3
0
3.3
0
8.3
0
11.1
0
15.0
0
20.0
0
0.0
1
0.5
1
1.3
1
3.3
1
8.3
1
11.1
1
15.0
1
20.0
1
0.0
15
0.5
15
1.3
15
3.3
15
8.3
15
11.1
15
15.0
15
20.0
15
0.0
30
0.5
30
1.3
30
3.3
30
8.3
30
11.1
30
15.0
30
20.0
30
EN/SET Serial Interface (S2Cwire™)
The current source output magnitude is controlled
by the EN/SET serial data interface. The interface
records rising edges of the EN/SET pin, and
decodes them into 32 individual current level set-
tings summarized in the above table. The modulo
32 interface wraps states back to state 1 after the
32nd clock, so the previous state is achieved by
clocking the EN/SET pin 31 times. The counter can
be clocked at speeds up to 1MHz, so intermediate
states are not visible. The first rising edge of
EN/SET enables the IC and initially sets the output
LED current to 0dB. Once the final clock cycle is
input for the desired brightness level, the EN/SET
pin is held high to maintain the device output cur-
rent at the programmed level. The device is dis-
abled 500µs after the EN/SET pin transitions to a
logic low state. The EN/SET timing is designed to
accommodate a wide range of data rates. After the
first rising edge of EN/SET, the charge pump is
enabled and reaches full capacity after the soft
start time (tSS). During the soft start time, multiple
clock pulses may be entered on the EN/SET pin to
set the final output current level with a single burst
of clocks. Alternatively, the EN/SET clock pulses
may be entered one at a time to gradually increase
the LED brightness over any desired time period. A
constant current is sourced as long as EN/SET
remains in a logic high state. The current source
outputs are switched off after EN/SET has
remained in a low state for at least the tOFF timeout
period.
3131.2004.08.1.1
9
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