SPI INTERFACE
Table 5. AD5160 Serial Data-Word Format
B7 B6 B5 B4 B3 B2 B1 B0
D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
27
20
AD5160
1
SDI
0
1
CLK
0
1
CS
0
1
VOUT
0
D7 D6 D5 D4 D3 D2 D1 D0
RDAC REGISTER LOAD
Figure 36. AD5160 SPI Interface Timing Diagram
(VA = 5 V, VB = 0 V, VW = ) VOUT
1
SDI
(DATA IN)
Dx
0
1
tCH
CLK
0
tCSHO
tCSS
1
CS
0
VDD
VOUT
0
Dx
tDS
tCL
tCH
tCS1
tCSH1
tCSW
tS
±1LSB
Figure 37. SPI Interface Detailed Timing Diagram (VA = 5 V, VB = 0 V, VW = ) VOUT
Rev. 0 | Page 11 of 16