AD5547 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD5547

Dual-Current Output, Parallel Input, 16-/14-Bit Multiplying DACs with 4-Quadrant Resistors

Analog Devices 

Data Sheet

AD5547/AD5557

Pin No.

23

24 to 28,

30 to 38

29

Mnemonic

RS

D13 to D0

Function

Active low resets both input and DAC registers. Resets to zero-scale if MSB = 0 and resets to midscale if MSB = 1.

Signal level must be ≤VDD + 0.3 V.

Digital Input Data Bits D13 to D0. Signal level must be ≤VDD + 0.3 V.

VDD

Positive Power Supply Input. The specified range of operation is 2.7 V to 5.5 V.

Table 5. Address Decoder Pins

A1

A0

0

0

0

1

1

0

1

1

Output Update

DAC A

None

DAC A and DAC B

DAC B

Table 6. Control Inputs

RS WR LDAC Register Operation

0X

X

Reset the output to 0 with MSB = 0; reset the output to midscale with MSB = 1.

10

0

Load the input register with data bits.

11

1

Load the DAC register with the contents of the input register.

10

1

The input and DAC registers are transparent.

1

When LDAC and WR are tied together and programmed as a pulse, the data bits are loaded into the input register

on the falling edge of the pulse and are then loaded into the DAC register on the rising edge of the pulse.

11

0

No register operation.

Rev. D | Page 9 of 20

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