AD6654CBCZ View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD6654CBCZ

14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver

Analog Devices 

AD6654

• In the Intel mode microport, the beginning of a read and

write access is indicated by the RDY pin going low. The

access is complete only when the RDY pin goes high. In the

Motorola mode microport, the completion of a read and

write access is indicated by the DTACK pin going low. In

both modes, CS, RD (DS), and WR (R/W) should be active

until access is complete; otherwise, an incomplete access

results.

• In both Intel and Motorola modes, if CS is held low even

after microport read or write access is complete, the

microport initiates a second access. This is a problem while

writing or reading from coefficient RAM, where each access

writes to or reads from a different RAM address. This can

be fixed by writing to one coefficient RAM address at a

time, that is, the coefficient start and stop address registers

have the same value.

• In SPI mode programming, the SCS pin must go high

(inactive) after writing or reading each byte (eight clock

cycles on the SCLK pin).

Rev. 0 | Page 86 of 88

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