AD8110_16 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD8110_16

260 MHz, 16 x 8 Buffered Video Crosspoint Switches

Analog Devices 

AD8110/AD8111

TIMING CHARACTERISTICS (Parallel)

Parameter

Data Setup Time

CLK Pulsewidth

Data Hold Time

CLK Pulse Separation

CLK to UPDATE Delay

UPDATE Pulsewidth

Propagation Delay, UPDATE to Switch On or Off

CLK, UPDATE Rise and Fall Times

RESET Time

Symbol

t1

t2

t3

t4

t5

t6

–

–

–

Limit

Min

Max

20

100

20

100

0

50

8

100

200

Unit

ns

ns

ns

ns

ns

ns

ns

ns

ns

1

CLK

0

1

D0–D4

A0–A2

0

1 = LATCHED

UPDATE

0 = TRANSPARENT

t2

t4

t1

t3

Figure 2. Timing Diagram, Parallel Mode

t5

t6

Table II. Logic Levels

VIH

RESET, SER/PAR

CLK, D0, D1, D2,

D3, D4, A0, A1, A2

CE, UPDATE

VIL

VOH

RESET, SER/PAR

CLK, D0, D1, D2,

D3, D4, A0, A1, A2

CE, UPDATE

DATA OUT

VOL

DATA OUT

2.0 V min

0.8 V max

2.7 V min 0.5 V max

IIH

RESET, SER/PAR

CLK, D0, D1, D2,

D3, D4, A0, A1, A2

CE, UPDATE

IIL

RESET, SER/PAR

CLK, D0, D1, D2,

D3, D4, A0, A1, A2

CE, UPDATE

IOH

DATA OUT

20 μA max

–400 μA min

–400 μA max

IOL

DATA OUT

3.0 mA min

–4–

3&7
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