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AD8505ARJZ-RL View Datasheet(PDF) - Analog Devices

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AD8505ARJZ-RL Datasheet PDF : 20 Pages
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THEORY OF OPERATION
The AD8505/AD8506/AD8508 are unity-gain, stable, CMOS, rail-
to-rail input/output operational amplifiers designed to optimize
performance in current consumption, PSRR, CMRR, and zero
crossover distortion, all embedded in a small package. The
typical offset voltage is 500 μV, with a low peak-to-peak voltage
noise of 2.8 μV from 0.1 Hz to 10 Hz and a voltage noise density
of 45 nV/√Hz at 1 kHz.
The AD8505/AD8506/AD8508 amplifiers are designed to solve
two key problems in low voltage battery-powered applications:
the battery voltage decrease over time and the rail-to-rail input
stage distortion.
In battery-powered applications, the supply voltage available to
the IC is the voltage of the battery. Unfortunately, the voltage of
a battery decreases as it discharges itself through the load. This
voltage drop over the lifetime of the battery causes an error in
the output of the op amps. Some applications requiring precision
measurements during the entire lifetime of the battery use voltage
regulators to power up the op amps as a solution. If a design
uses standard battery cells, the op amps experience a supply
voltage change from roughly 3.2 V to 1.8 V during the lifetime
of the battery. This means that for a PSRR of 70 dB minimum in
a typical op amp, the input-referred offset error is approximately
440 μV. If the same application uses the AD8505/AD8506/
AD8508 amplifiers with a 100 dB minimum PSRR, the error is
only 14 μV. It is possible to calibrate out this error or to use an
external voltage regulator to power the op amp, but these solutions
can increase system cost and complexity. The AD8505/AD8506/
AD8508 amplifiers solve the impasse with no additional cost or
error-nullifying circuitry.
The second problem with battery-powered applications is the
distortion caused by the standard rail-to-rail input stage. Using
a CMOS non-rail-to-rail input stage (that is, a single differential
pair) limits the input voltage to approximately one VGS (gate-
source voltage) away from one of the supply lines. Because VGS
for normal operation is commonly over 1 V, a single differential
pair input stage op amp greatly restricts the allowable input
voltage range when using a low supply voltage. This limitation
restricts the number of applications where the non-rail-to-rail
input op amp was originally intended to be used. To solve this
problem, a dual differential pair input stage is usually implemented
(see Figure 45); however, this technique has its own drawbacks.
One differential pair amplifies the input signal when the common-
mode voltage is on the high end, whereas the other pair amplifies
the input signal when the common-mode voltage is on the low
end. This method also requires control circuitry to operate the
two differential pairs appropriately. Unfortunately, this topology
leads to a very noticeable and undesirable problem: if the signal
level moves through the range where one input stage turns off
and the other one turns on, noticeable distortion occurs (see
Figure 46).
AD8505/AD8506/AD8508
VDD
VBIAS
VIN+
Q3
IB
Q1
Q2
VIN–
Q4
IB
VSS
Figure 45. A Typical Dual Differential Pair Input Stage Op Amp
(Dual PMOS Q1 and Q2 Transistors Form the Lower End of the Input Voltage
Range, Whereas Dual NMOS Q3 and Q4 Compose the Upper End)
300
VSY = 5V
250 TA = 25°C
200
150
100
50
0
–50
–100
–150
–200
–250
–300
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM (V)
Figure 46. Typical Input Offset Voltage vs. Common-Mode Voltage
Response in a Dual Differential Pair Input Stage Op Amp (Powered by 5 V
Supply; Results of Approximately 100 Units per Graph Are Displayed)
This distortion forces the designer to devise impractical ways
to avoid the crossover distortion areas, therefore narrowing the
common-mode dynamic range of the operational amplifier. The
AD8505/AD8506/AD8508 amplifiers solve this crossover dis-
tortion problem by using an on-chip charge pump to power the
input differential pair. The charge pump creates a supply voltage
higher than the voltage of the battery, allowing the input stage to
handle a wide range of input signal voltages without using a second
differential pair. With this solution, the input voltage can vary from
one supply extreme to the other with no distortion, thereby
restoring the full common-mode dynamic range of the op amp.
Rev. E | Page 13 of 20

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