AD9508(RevA) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9508 Datasheet PDF : 40 Pages
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AD9508
Data Sheet
OUT0 FUNCTIONS (REGISTER 0x15 TO REGISTER 0x1A)
Table 27. Divide Ratio and Phase
Address Bits Bit Name
0x15
[7:0] OUT0 Divide Ratio[7:0]
0x16
[7:2] Reserved
[1:0] OUT0 Divide Ratio[9:8]
0x17
[7:0] OUT0 Phase[7:0]
0x18
[7:3] Reserved
[2:0] OUT0 Phase[10:8]
Description
Channel 0 divide ratio, Bits[7:0]
0x00 = default
Channel 0 divide ratio, Bits[9:8]
Channel 0 divider phase, Bits[7:0]
0x00 = default
Channel 0 divider phase, Bits[9:8]
Table 28. Output Driver, Power Down, and Sync
Address Bits Bit Name
Description
0x19
7
PD_0
Channel 0 power down
6
SYNCMASK0
Setting this bit masks Channel 0 from the output sync function
0 = Channel 0 is synchronized during output sync (default)
1 = Channel 0 is excluded from an output sync
[5:4] OUT0 Driver Phase[1:0]
These bits determine the phase of the OUT0 driver
00 = force high
01 = noninverting (default)
10 = inverting
11 = force low
[3:1] OUT0 Mode[2:0]
These bits determine the OUT0 driver mode
000 = LVDS 0.5 × 3.5 mA (1/2 amplitude)
001 = LVDS 0.75 × 3.5 mA (3/4 amplitude)
010 = LVDS 1 × 3.5 mA (default)
011 = LVDS 1.25 × 3.5 mA (1.25 amplitude)
100 = HSTL 1 × 3.5 mA (normal amplitude)
101 = HSTL 2 × 3.5 mA (double amplitude)
110 = high-Z/CMOS
111 = high-Z/CMOS
0
Reserved
0b = default
0x1A
7
EN_CMOS_0P
Setting this bit enables the OUT0P CMOS driver
0 = disables the OUT0P CMOS driver (default)
1 = enables the OUT0P CMOS driver
[6:5] CMOS_0P_PHASE[1:0]
These bits determine the phase of the OUT0P CMOS driver
00 = force high (default)
01 = noninverting
10 = inverting
11 = force low
4
EN_CMOS_0N
Setting this bit enables the OUT0N CMOS driver
0 = disables the OUT0N CMOS driver (default)
1 = enables the OUT0N CMOS driver
[3:2] CMOS_0N_PHASE[1:0]
These bits determine the phase of the OUT0N CMOS driver
00 = force high (default)
01 = noninverting
10 = inverting
11 = force low
[1:0] Reserved
00b = default
Rev. A | Page 34 of 40
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