APPLICATIONS
TYPICAL PERFORMANCE VALUES
To reduce design time and eliminate uncertainty Table 6
provides a convenient reference for typical gains, component
values, and performance parameters.
16-BIT ADC DRIVER
The combination of low noise, low power, and high speed
make the ADA4841-1/ADA4841-2 the perfect driver solution
for low power, 16-bit ADCs, such as the AD7685. Figure 49
shows a typical 16-bit single-supply application.
There are different challenges to a single-supply, high resolution
design, and the ADA4841-1/ADA4841-2 address these nicely.
In a single-supply system, a main challenge is using the
amplifier in buffer mode with the lowest output noise and
preserving linearity compatible with the ADC.
Rail-to-rail input amplifiers are usually higher noise than the
ADA4841-1/ADA4841-2 and cannot be used in this mode
because of the nonlinear region around the crossover point of
their input stages. The ADA4841-1/ADA4841-2, which have no
crossover region but have a wide linear input range from 100 mV
below ground to 1 V below positive rail, solve this problem, as
shown in Figure 49. The amplifier, when configured as a
follower, has a linear signal range from 0.25 V above the minus
supply voltage (limited by the amplifier’s output stage) to 1 V
below the positive supply (limited by the amplifier input stage).
A 0 V to +4.096 V signal range can be accommodated with a
positive supply as low as +5.2 V and a negative power supply of
−0.25 V. The 5.2 V supply also allows the use of a small, low
dropout, low temperature drift ADR364 reference voltage. If
ground is used as the amplifier negative supply, then note that at
the low end of the input range close to ground, the ADA4841-1/
ADA4841-2 exhibit substantial nonlinearity, as any rail-to-rail
output amplifier. The ADA4841-1/ADA4841-2 drive a one-
pole, low-pass filter. This filter limits the already very low noise
contribution from the amplifier to the AD7685.
+5.2V
100nF
ADR364
10μF
100nF
0V TO 4.096V
ADA4841 100nF
33Ω
–0.25V
2.7nF
REF
IN+
VDD
AD7685
IN–
GND
VIO
SDI
SCK
SDO
CNV
Figure 49. ADC Driver Schematic
ADA4841-1/ADA4841-2
RECONSTRUCTION FILTER
The ADA4841-1/ADA4841-2 can also be used as a reconstruction
filter at the output of DACs for suppression of the sampling
frequency. The filter shown in Figure 50 is a two-pole, 500 kHz
Sallen-Key LPF with a fixed gain of G = +1.6.
C2
1320pF
+5V 10μF
INPUT
R1
249Ω
R2
249Ω
C1
1320pF
0.1μF
U1
0.1μF
OUTPUT
10μF
–5V
R3
840Ω
R4
499Ω
Figure 50. Two-Pole 500 kHz Reconstruction Filter Schematic
Setting the resistors and capacitors equal to each other greatly
simplifies the design equations for the Sallen-Key filter. The
corner frequency, or −3 dB frequency, can be described by
the equation
fC
=
1
2πR1C1
The quality factor, or Q, is shown in the equation
Q= 1
3−K
For minimum peaking, set Q equal to 0.707.
The gain, or K, of the amplifier is
K = R4 +1
R3
Resistor values are kept low for minimal noise contribution,
offset voltage, and optimal frequency response.
Rev. C | Page 17 of 20