AIC1573CS View Datasheet(PDF) - Analog Intergrations

Part Name

Description

Manufacturer

AIC1573CS

5-bit DAC, Synchronous PWM Power Regulator with Simple PWM Power Regulator, LDO And Linear Controller

Analog Intergrations 

AIC1573

creasing the frequency by the

following figure (Fig.3).

This pin is 1.26V during normal

operation, but it is pulled to VCC

in the event of an over-voltage or

over-current condition.

f

=

f0 1 +

25.2K

RT



,

RT pulled to GND

f

=

f0

1

−

VCC

5

− 1.26V

× RT

 ,

RT pulled to VCC,

where f0 is free run frequency.

Pin14: VSEN4: Connect this pin to the 1.8V

linear regulator’s output. This pin

is monitored for under-voltage

events.

Pin15: DRIVE4: Connect this pin to the gate of

the external N-MOS to supply

1.8V power for Memorey re-

quirement.

Pin 16: VAUX: The +3.3V input voltage at this

pin is monitored for power-on –

reset (POR) purpose. Connect to

+5V provides boost current for

the linear regulator’s output.

Pin 17: GND: Signal GND for IC. All voltage

levels are measured with respect

to this pin.

Pin 18: DRIVE3: Connect this pin to the Gate of

the external N-MOS for providing

1.5V power to GTL bus.

Pin 19: VSEN3: Connect this pin to the 1.5V

linear regulator’s output. This pin

is monitored for under-voltage

events.

Pin 20: COMP1: External compensation pin of the

synchronous PWM converter.

This pin is connected to error

amplifier output and PWM com-

parator. A RC network is con-

nected to FB1 in to compensate

the voltage control feedback loop

of the converter.

Pin 21: FB1: The error amplifier inverting input

pin of the synchronous PWM

converter. The FB1 pin and

COMP1 pin are used to compen-

sate the voltage-control feedback

loop.

Pin 22: VSEN1: Synchronous PWM converter’s

output voltage sense pin. Con-

nect this pin to the converter out-

put. The PGOOD and OVP com-

parator circuits use this signal to

report output voltage status and

for over-voltage protection func-

tion.

Pin 23: OCSET1: Current limit sense pin. Connect

a resistor ROCSET from this pin to

the drain of the external high-side

N-MOSFET. ROCSET, an internal

200µA current source (IOCSET),

and the upper N-MOSFET on-

resistance (RDS(ON)) set the over-

current trip point according to the

following equation:

IPEAK = IOCSET × ROCSET

RDS(ON)

The voltage at this pin is also

moni tored for power-on reset

(POR) purpose.

Pin 24: PGND: Driver power GND pin. PGND

should be connected to a low im-

pedance ground plane in close to

lower N-MOSFET source.

Pin 25: LGATE1: Lower N-MOSFET gate drive pin

of the synchronous PWM con-

verter.

Pin 26: PHASE1:

Over-current detection pin. Con-

11

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