AT80C51RD2-SLSUL View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT80C51RD2-SLSUL Datasheet PDF : 83 Pages
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AT80C51RD2/AT83C51Rx2
Table 8. AUXR Register
AUXR - Auxiliary Register (8Eh)
7
6
5
4
-
-
M0
-
3
XRS1
2
1
0
XRS0
EXTRAM
AO
Bit
Number
7
6
5
4
3
2
Bit
Mnemonic Description
Reserved
-
The value read from this bit is indeterminate. Do not set this bit
Reserved
-
The value read from this bit is indeterminate. Do not set this bit
M0
Pulse length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock periods.
Reserved
-
The value read from this bit is indeterminate. Do not set this bit
XRS1
XRS0
XRAM Size
XRS1 XRS0
0
0
0
1
1
0
1
1
XRAM Size
256 bytes (default)
512 bytes
768 bytes
1024 bytes
1
EXTRAM EXTRAM bit
Cleared to access internal XRAM using MOVX @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
0
AO
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used) (default). Set, ALE is active only if a MOVX or MOVC
instruction is used.
Reset Value = XX0X 00’HSB.XRAM’0b (see Table 7)
Not bit addressable
17
4113B–8051–03/05
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