XRD9812 View Datasheet(PDF) - Exar Corporation

Part Name

Description

Manufacturer

XRD9812

3-Channel 10/12-Bit Linear CCD & CIS Sensor Signal Processors

Exar Corporation 

XRD9810/12

droop will be equal to the clamp level minus the difference

between the black and video levels. For example if

Vc=4V, and the CCD video output is -2V relative to the

black level the maximum allowable droop is equal to 2V.

Using the previous equation and assuming T=500ns,

n=3000

C min = 10 nA × 3000 × 500 ns = 7.5pF

2V

Vdroop = Ibias × T

2 × C min

Note: These are the absolute minimum capacitor

requirements. As stated for pixel-mode a minimum value

of 68pF is recommended.

Minimum Capacitance (S/H Line Mode)

Unlike Line or Pixel CDS modes voltage droop across a

line appears as an absolute error and is the dominant

factor in determining the minimum coupling capacitor

size.

Ibias × n × T

C min =

Ve

where Ibias=input bias current

n=number of pixels per line

T=pixel period

Assuming n=3000, T=500nS, I=10nA and Ve=200uV the

minimum required capacitor is 75nF.

Maximum Capacitance (S/H Line Mode)

The maximum capacitance is determined by the amount

of time allowed to charge the coupling capacitor. In order

to minimize the charging time the maximum capacitor

can be set to the minimum value as previously calculated.

In this case the

time required to charge the capacitor is:

t=

( Rs +

Rc ) × C min

×

ln

æèç

Vr

- Vc

Ve

öø÷

where t= clamp pulse -width ( SYNCH)

Rc=clamp resistance

Rs=Signal source-resistance

Vr= Input reference level

Vc=XRD9810 clamp voltage

Ve=error voltage

Cmin = coupling capacitor

Assuming that Vr=.5 Vc=0V, Ve=200uV, Rc=100W,

Rs=500W and C=75nF, the minimum clamp period is

equal to 352mS.

Rev. 1.00

21

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