C8051F300 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

C8051F300

Mixed Signal ISP Flash MCU Family

Unspecified 

C8051F300/1/2/3/4/5

17.2. C2 Pin Sharing

The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and

Flash programming functions may be performed. This is possible because C2 communication is typically

performed when the device is in the halt state, where all on-chip peripherals and user software are stalled.

In this halted state, the C2 interface can safely ‘borrow’ the C2CK (normally /RST) and C2D (normally

P0.7) pins. In most applications, external resistors are required to isolate C2 interface traffic from the user

application. A typical isolation configuration is shown in Figure 17.1.

C8051F300

/Reset (a)

Input (b)

Output (c)

C2CK (/RST)

C2D (P0.7)

C2 Interface Master

Figure 17.1. Typical C2 Pin Sharing

The configuration in Figure 17.1 assumes the following:

1. The user input (b) cannot change state while the target device is halted.

2. The /RST pin on the target device is used as an input only.

Additional resistors may be necessary depending on the specific application.

Rev. 2.6

171

Share Link: