CS1630 View Datasheet(PDF) - Apex Microtechnology
Part Name
Description
Manufacturer
CS1630 Datasheet PDF : 56 Pages
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CS1630/31
6.41 Configuration 60 (Config60) – Address 92
7
6
5
4
3
2
1
0
-
PLC
-
CS_DELAY2 CS_DELAY1 CS_DELAY0
-
-
Number
[ 7]
[6]
[5]
[4:2]
Name
Description
-
Reserved
Configures the power line calibration (PLC) mode.
PLC
0 = Enable
1 = Disable
-
Reserved
Configures the ISense comparator delay and board delays incurred through
FET switching T1comp. Switching time T1comp can be set from 0ns to 350ns in
CS_DELAY[2:0] steps of 50ns.
[ 1:0 ]
-
Reserved
T1comp = CS_DELAY[2:0] 50ns
6.42 Configuration 61 (Config61) – Address 93
7
6
5
4
3
2
1
0
DITNODIM DITLEVEL1 DITLEVEL0 DITCHAN
-
-
-
-
Number
Name
Description
Configures dithering, if enabled, to work in No-dimmer mode only.
[ 7]
DITNODIM
0 = Dithering works in all modes
1 = Dithering works in No-dimmer mode only
[ 6:5 ]
Configures the second stage dithering level based on the percentage of varia-
tion on the ISense DAC reference setting.
DITLEVEL[1:0]
00 = 1.3%
01 = 2.9%
10 = 6%
11 = 12.3%
Selects the channel for less dithering for which the nominal dither level, set
[4]
DITCHAN
using bits DITLEVEL[1:0], is attenuated by the amount set by bits DITATT[1:0].
0 = Channel 1
1 = Channel 2
[ 3:0 ]
-
Reserved
DS954F2
49
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