GLT40516-10E View Datasheet(PDF) - G-Link Technology

Part Name

Description

Manufacturer

GLT40516-10E

32k x 16 Embedded EDO DRAM

G-Link Technology  

GLT40516-10E

32k x 16 Embedded EDO DRAM

F EATURES

x Logical organization: 32k x 16 bits

x Physical organization: 256 x 128 x 16

x Single 3.3V ± 0.3V power supply

x 256 cycle refresh in 4 ms

x Refresh modes: RAS only, CBR, and Hidden

x Dual CAS for Byte Write and Byte Read control

x Separate I/O operation

x 100 MHz page mode EDO cycle

x 30 ns row access time

x Redundancy: 2 WL/256K, 2 CS/1M

GENERAL DESCRIPTION

The 512Kbit Embedded DRAM (EmDRAM) is an asyn-

Performance Data

chronous design with non-multiplexed row and column

addressing scheme. The memory operations are con-

Parameter

-30

trolled by RAS, CASH/CASL, and WE. Byte access is

Max. RAS access time, tRAC

30 ns

controlled by CASH (upper byte) and CASL (lower byte).

Max. column address access time, tAA

12 ns

The EmDRAM has been designed to support 200Mbyte

Max. CAS access time, tCAC

8 ns

data rate with a 30 ns latency when operated in the page

Min. extended data out page mode cycle time, tPC

10 ns

mode with extended data output (EDO). this maximum

Min. read/write cycle time, tRC

60 ns

rate can be sustained for one page of 12 bytes.

May 1997 (Rev. 1) 1

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