PSoC® 5LP: CY8C54LP Family
Datasheet
Appendix: CSP Package Summary
General Description
This section contains preliminary data on the CY8C58 device in a 99-pin CSP package.
Electrical Specifications
The following specifications show differences in electrical specifications for CSP package devices.
Table 1. Electrical Specifications
Parameter
TBD
Description
Conditions
Min
Typ
Max Units
Pinout
Table 2 shows the pinout for the 99-pin CSP package. Since there are four VDDIO pins, the set of I/O pins associated with any VDDIO
may sink up to 100 mA total, same as for the 100-pin and 68-pin devices.
Table 2. CSP Pinout
Ball
Name
Ball
E5
P2[5]
L2
G6
P2[6]
K2
G5
P2[7]
C9
H6
P12[4]
E8
K7
P12[5]
K1
L8
P6[4]
H2
J6
P6[5]
F4
H5
P6[6]
J1
J5
P6[7]
H1
L7
VSSB
F3
K6
Ind
G1
L6
VBOOST
G2
K5
VBAT
F2
L5
VSSD
E2
L4
XRES_N
F1
J4
P5[0]
E1
K4
P5[1]
D1
K3
P5[2]
D2
L3
P5[3]
C1
H4
P1[0]
C2
J3
P1[1]
D3
H3
P1[2]
D4
J2
P1[3]
B4
G4
P1[4]
A2
G3
P1[5]
B1
Name
VIO1
P1[6]
P4[2]
P4[3]
P1[7]
P12[6]
P12[7]
P5[4]
P5[5]
P5[6]
P5[7]
P15[6]
P15[7]
VDDD
VSSD
VCCD
P15[0]
P15[1]
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
VIO3
Ball
Name
Ball
Name
B2
P3[6]
C8
VIO0
B3
P3[7]
D7
P0[4]
C3
P12[0]
E7
P0[5]
C4
P12[1]
B9
P0[6]
E3
P15[2]
D8
P0[7]
E4
P15[3]
D9
P4[4]
A1
NC
F8
P4[5]
A9
NC
F7
P4[6]
L1
NC
E6
P4[7]
L9
NC
E9
VCCD
A3
VCCA
F9
VSSD
A4
VSSA
G9
VDDD
B7
VSSA
H9
P6[0]
B8
VSSA
G8
P6[1]
C7
VSSA
H8
P6[2]
A5
VDDA
J9
P6[3]
A6
VSSD
G7
P15[4]
B5
P12[2]
F6
P15[5]
A7
P12[3]
F5
P2[0]
C5
P4[0]
J7
P2[1]
D5
P4[1]
J8
P2[2]
B6
P0[0]
K9
P2[3]
C6
P0[1]
H7
P2[4]
A8
P0[2]
K8
VIO2
D6
P0[3]
Document Number: 001-84934 Rev. *E
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