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D950-CORE View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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D950-CORE Datasheet PDF : 89 Pages
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D950-Core
7.5.2 Registers
There are two types of registers for the EMU, data registers, and control and status registers.
They are mapped in the Y-memory space.
Data Registers
BP0, BP1, BP2, BP3: Breakpoint registers
0, 1, 2, 3 values. 16-bit breakpoint registers allowing breakpoints.
BPC: Breakpoint Counter register. This 16-bit register is initialized by a load instruction and
decremented each time a valid condition is met on a count enabled breakpoint. Breakpoints
with and without a count condition can be set simultaneously. After reset, BPC is not initialized.
PCB: Program Counter Trace Buffer register allows the user to keep trace of the PC value for
the six last executed instructions. PCB stores one address value per instruction, whatever the
instruction type (single cycle, single word, multiple cycles, multiple words)
Control and Status Registers
Three breakpoint control registers allow simple or multiple breakpoints (conditional or not) to
be set and counting breakpoint events to be enabled..
Breakpoint Register
BP3
BP2
BP1
BP0
Breakpoint Location
Program memory address
or Data memory data
Data memory
Address
Bus
IA or YD
IA or XD
XA or
YA
85/89

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