SD53-4R7-R View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
SD53-4R7-R Datasheet PDF : 28 Pages
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ADP2300/ADP2301
APPLICATIONS INFORMATION
PROGRAMMING THE OUTPUT VOLTAGE
The output voltage of the ADP2300/ADP2301 is externally set by
a resistive voltage divider from the output voltage to the FB pin,
as shown in Figure 42. Suggested resistor values for the typical
output voltage setting are listed in Table 6. The equation for the
output voltage setting is
VOUT
= 0.800 V × ⎜⎜⎝⎛1+
R FB1
R FB 2
⎟⎟⎠⎞
where:
VOUT is the output voltage.
RFB1 is the feedback resistor from VOUT to FB.
RFB2 is the feedback resistor from FB to GND.
ADP2300/
ADP2301
FB
RFB1
RFB2
VOUT
Figure 42. Programming the Output Voltage Using a Resistive Voltage Divider
Table 6. Suggested Values for Resistive Voltage Divider
VOUT (V)
RFB1 (kΩ), ±1%
RFB2 (kΩ), ±1%
1.2
4.99
10
1.8
12.7
10.2
2.5
21.5
10.2
3.3
31.6
10.2
5.0
52.3
10
VOLTAGE CONVERSION LIMITATIONS
There are both lower and upper output voltage limitations for a
given input voltage due to the minimum on time, the minimum
off time, and the bootstrap dropout voltage.
The lower limit of the output voltage is constrained by the finite,
controllable minimum on time, which can be as high as 135 ns for
the worst case. By considering the variation of both the switching
frequency and the input voltage, the equation for the lower limit
of the output voltage is
VOUT(min) = t MIN-ON × f SW(max) × (VIN(max) + VD ) − VD
where:
VIN(max) is the maximum input voltage.
fSW(max) is the maximum switching frequency for the worst case.
tMIN-ON is the minimum controllable on time.
VD is the diode forward drop.
The upper limit of the output voltage is constrained by the mini-
mum controllable off time, which can be as high as 120 ns in
the ADP2301 for the worst case. By considering the variation of
both the switching frequency and the input voltage, the equation
for the upper limit of the output voltage is
VOUT(max) = (1 − t MIN-OFF × f SW(max) )× (VIN(min) + VD ) − VD
where:
VIN(min) is the minimum input voltage.
fSW(max) is the maximum switching frequency for the worst case.
VD is the diode forward drop.
tMIN-OFF is the minimum controllable off time.
In addition, the bootstrap circuit limits the minimum input
voltage for the desired output due to internal dropout voltage.
To attain stable operation at light loads and ensure proper startup
for the prebias condition, the ADP2300/ADP2301 require the
voltage difference between the input voltage and the regulated
output voltage (or between the input voltage and the prebias
voltage) to be greater than 2.1 V for the worst case. If the voltage
difference is smaller, the bootstrap circuit relies on some minimum
load current to charge the boost capacitor for startup. Figure 43
shows the typical required minimum input voltage vs. load current
for the 3.3 V output voltage.
Rev. 0 | Page 16 of 28
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