PSB 2132
PSB 2134
Interrupt Handling
The following example shows the interrupt functionality of channel-pair-1,2,
SBx_x are programmed as outputs:
No
No
Samples Change Change Change Change Change Stable Change Change Change Change Stable Change
SI1_0
SI1_1
SI2_0
SI2_1
INT12
Debounce Time,
Adjusted in XR4
After XOP READ-Command, INT12 is cleared !
(read XR3, XR2, XR1, XR0 within the Interrupt-Handler)
ITD10546
Figure 2
Example, Status Information in XR-Registers for Both Channel-pairs 1,2 and 3,4
The status information of the appropriate channel-pair-1,2 (or 3,4) will be read into the
XR-registers with the rising edge of INT12 (or INT34) and remains valid until the next
rising edge of INT12 (or INT34) updates the status information.
The assigned interrupt INT12 is cleared if the appropriate registers (XR0, XR1, XR2 and
XR3, read with command XOP := 3BH) are read via the serial µC-interface.
Semiconductor Group
5
1998-04-01