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GS1575A View Datasheet(PDF) - Gennum -> Semtech

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Description
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GS1575A Datasheet PDF : 29 Pages
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4. Detailed Description
GS1575A / GS9075A Data Sheet
The GS1575A/9075A is a Multi-Rate Serial Digital Reclocker designed to
automatically recover the embedded clock from a digital video signal and re-time
the incoming video data.
The GS1575A will recover the embedded clock signal and re-time the data from a
SMPTE 292M, SMPTE 259M or SMPTE 344M compliant digital video signal.
The GS9075A will recover the embedded clock signal and re-time the data from a
SMPTE 259M or SMPTE 344M compliant digital video signal.
Using the functional block diagram (page 2) as a guide, Slew Rate Phase Lock
Loop (S-PLL) on page 17 to Output Mute on page 23 describes each aspect of the
GS1575A/9075A in detail.
4.1 Slew Rate Phase Lock Loop (S-PLL)
The term “slew” refers to the output phase of the PLL in response to a step change
at the input. Linear PLLs have an output phase response characterized by an
exponential response whereas an S-PLL’s output is a ramp response (see
Figure 4-1). Because of this non-linear response characteristic, traditional small
signal analysis is not possible with an S-PLL.
0.2
INPUT
0.1
OUTPUT
0.0
SLEW PLL RESPONSE
0.2
INPUT
0.1
OUTPUT
0.0
LINEAR (CONVENTIONAL) PLL RESPONSE
Figure 4-1: PLL Characteristics
34716 - 0 December 2005
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