HA-2542
Test Circuits and Waveforms (Continued)
VIN
VOUT
Vertical Scale: 100mV/Div.
Horizontal Scale: 50ns/Div.
Vertical Scale: 100mV/Div.
Horizontal Scale: 10ns/Div.
VS = ±15V, RL = 1kΩ. Propagation delay variance
is negligible over full temperature range.
SMALL SIGNAL RESPONSE
2.5kΩ
5kΩ
1kΩ
500Ω
V+
VIN
-
+
V-
SETTLING
POINT
VOUT
PROPAGATION DELAY
NOTES:
11. AV = -2.
12. Feedback and summing resistors must be matched (0.1%).
13. HP5082-2810 clipping diodes recommended.
14. Tektronix P6201 FET probe used at settling point.
15. For 0.01% settling time, heat sinking is suggested to reduce
thermal effects and an analog ground plane with supply
decoupling is suggested to minimize ground loop errors.
SETTLING TIME TEST CIRCUIT (SEE NOTES 11 - 15.)
Schematic Diagram
R11 R7 R8 R9
QP15 QP13
QP31
R14
QN12
QP11
BAL
QP14
R10
75Ω
R25
5kΩ
QP34
QP5
QN42
QN1 QN2
+IN
-IN
C1
QN44
R6
R18
DZ45
QN18
4
BAL
R12
75Ω
QP16
R26
5kΩ
QP35
R15
QP33
QP7
QP32
QN23
QP36
QN
COMP